#include <SimulatedFPGA.h>

Inheritance diagram for LSST::M1M3::SS::SimulatedFPGA:

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Collaboration diagram for LSST::M1M3::SS::SimulatedFPGA:

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Public Member Functions
void	initialize () override

void	open () override

void	close () override

void	finalize () override

void	waitForOuterLoopClock (uint32_t) override
	Wait for outer loop clock interrupt for synchronization between C++ and FPGA code.

void	ackOuterLoopClock () override
	Acknowledge (clear interrupt 0) outer loop clock.

void	waitForPPS (uint32_t) override
	Waits for Peer-to-Peer Synchronization interrupt (10).

void	ackPPS () override
	Acknowledge (clear) Peer-to-Peer Synchronization interrupt.

void	waitForModbusIRQs (uint32_t, uint32_t) override
	Wait for ModBus interrupts.

void	ackModbusIRQs () override
	Acknowledge ModBus interrupt reception.

void	pullTelemetry () override
	Retrieve telemetry data.

void	pullHealthAndStatus () override
	Retrieve Health&Status data.

void	writeCommandFIFO (uint16_t *data, size_t length, uint32_t timeoutInMs) override

void	writeRequestFIFO (uint16_t *data, size_t length, uint32_t timeoutInMs) override

void	writeTimestampFIFO (uint64_t timestamp) override
	Write current timestamp value into timestampFIFO.

void	readU8ResponseFIFO (uint8_t *data, size_t length, uint32_t timeoutInMs) override

void	readU16ResponseFIFO (uint16_t *data, size_t length, uint32_t timeoutInMs) override

void	writeMPUFIFO (cRIO::MPU &mpu, const std::vector< uint8_t > &data, uint32_t timeout) override

std::vector< uint8_t >	readMPUFIFO (cRIO::MPU &mpu) override

void	waitOnIrqs (uint32_t irqs, uint32_t timeout, bool &timedout, uint32_t *triggered=NULL) override

void	ackIrqs (uint32_t irqs) override

uint32_t	getIrq (uint8_t bus) override

void	writeHealthAndStatusFIFO (uint16_t request, uint16_t param=0) override
	Requests HealthAndStatus data.

void	readHealthAndStatusFIFO (uint64_t *data, size_t length, uint32_t timeoutInMs=10) override
	Copy HealthAndStatus data into supplied data buffer.

void	readRawAccelerometerFIFO (uint64_t *raw, size_t samples) override
	Reads raw accelerometer FIFO.

Public Member Functions inherited from LSST::M1M3::SS::IFPGA
uint16_t	getTxCommand (uint8_t bus) override

uint16_t	getRxCommand (uint8_t bus) override

uint32_t	getIrq (uint8_t bus) override

SupportFPGAData *	getSupportFPGAData ()
	Call after pullTelemetry to retrieve telemetry data.

HealthAndStatusFPGAData *	getHealthAndStatusFPGAData ()
	Call after pullHealthAndStatus to retrieve HealthAndStatus data.

void	setPower (bool aux, bool network)
	Sets all auxiliary and network buses power (A-D).

void	setPower (const bool aux[4], const bool network[4])
	Sets aux and network power.

Additional Inherited Members
Static Public Member Functions inherited from LSST::M1M3::SS::IFPGA
static IFPGA &	get ()

Protected Attributes inherited from LSST::M1M3::SS::IFPGA
SupportFPGAData	supportFPGAData

HealthAndStatusFPGAData	healthAndStatusFPGAData

Detailed Description

FPGA simulator.

Simulates MODBUS communication with devices.

Member Function Documentation

◆ ackModbusIRQs()

void SimulatedFPGA::ackModbusIRQs ( )

overridevirtual

Acknowledge ModBus interrupt reception.

Interrupt can be generated (raised on the FPGA side) again after being acknowledged.

Exceptions

NiError on NI error

Implements LSST::M1M3::SS::IFPGA.

◆ ackOuterLoopClock()

void SimulatedFPGA::ackOuterLoopClock ( )

overridevirtual

Acknowledge (clear interrupt 0) outer loop clock.

Exceptions

NiError on NI error

Implements LSST::M1M3::SS::IFPGA.

◆ ackPPS()

void SimulatedFPGA::ackPPS ( )

overridevirtual

Acknowledge (clear) Peer-to-Peer Synchronization interrupt.

Exceptions

NiError on NI error

Implements LSST::M1M3::SS::IFPGA.

◆ pullHealthAndStatus()

void SimulatedFPGA::pullHealthAndStatus ( )

overridevirtual

Retrieve Health&Status data.

Exceptions

NiError on NI error

Implements LSST::M1M3::SS::IFPGA.

◆ pullTelemetry()

void SimulatedFPGA::pullTelemetry ( )

overridevirtual

Retrieve telemetry data.

Exceptions

NiError on NI error

Implements LSST::M1M3::SS::IFPGA.

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◆ readHealthAndStatusFIFO()

void SimulatedFPGA::readHealthAndStatusFIFO	(	uint64_t *	data,
		size_t	length,
		uint32_t	timeoutInMs = 10 )

overridevirtual

Copy HealthAndStatus data into supplied data buffer.

Parameters

data	memory data will be copied
length	buffer length. Must match FPGA defined memory size (64)
timeoutInMs	timeout in microseconds

Exceptions

NiError on NI error

Implements LSST::M1M3::SS::IFPGA.

◆ readRawAccelerometerFIFO()

void SimulatedFPGA::readRawAccelerometerFIFO	(	uint64_t *	raw,
		size_t	samples )

overridevirtual

Reads raw accelerometer FIFO.

Waits for new data if no data are available.

Parameters

raw	8 raw accelerometer values. Data are stored as 24 bits fixed points (5 bits integer part) in uint64_t. So actually on 3 bytes out of 64 are used - that copies NI interface for accessing fixed points
samples	number of samples

Implements LSST::M1M3::SS::IFPGA.

◆ readU8ResponseFIFO()

void SimulatedFPGA::readU8ResponseFIFO	(	uint8_t *	data,
		size_t	length,
		uint32_t	timeoutInMs )

overridevirtual

Exceptions

NiError on NI error

Implements LSST::M1M3::SS::IFPGA.

◆ waitForModbusIRQs()

void SimulatedFPGA::waitForModbusIRQs	(	uint32_t	warning_timeout,
		uint32_t	error_timeout )

overridevirtual

Wait for ModBus interrupts.

The interrupt is generated when ModBus command 0x7 is processed.

Parameters

warning_timeout	warning timeout for IRQ call in milliseconds
error_timeout	after that time (in millisecond) expires, and error will be thrown

Exceptions

NiError	on NI error
std::runtime_error	on timeout

Implements LSST::M1M3::SS::IFPGA.

◆ waitForOuterLoopClock()

void SimulatedFPGA::waitForOuterLoopClock ( uint32_t timeout )

overridevirtual

Wait for outer loop clock interrupt for synchronization between C++ and FPGA code.

The interrupt (0) is raised every 20 ms inside FPGA code (OuterLoop/OuterLoopClock.vi).

Parameters

timeout after that time (in millisecond) expires, and error will be thrown

Exceptions

NiError on NI error

See also: writeTimestampFIFO

Implements LSST::M1M3::SS::IFPGA.

◆ waitForPPS()

void SimulatedFPGA::waitForPPS ( uint32_t timeout )

overridevirtual

Waits for Peer-to-Peer Synchronization interrupt (10).

The interrupt is raised in Timestamp/Timestamp.vi and signals FPGA is ready to read peer time offset from TimestampControlFIFO.

Parameters

timeout call timeout in milliseconds. TimeStamp VI introduces 1 milliseconds delay between successive waits for interrupt, so this value shall be larger than 1000.

Exceptions

NiError on NI error

Implements LSST::M1M3::SS::IFPGA.

◆ writeHealthAndStatusFIFO()

void SimulatedFPGA::writeHealthAndStatusFIFO	(	uint16_t	request,
		uint16_t	param = 0 )

overridevirtual

Requests HealthAndStatus data.

Response can be read calling readHealthAndStatusFIFO method.

Request types are:

1 return single U64 value at address param
2 return full HealthAndStatus memory. Size is specified when creating HealthAndStatus memory.
3 clear health and status memory

Parameters

request	request type, see above
param	relevant only for request 1

Exceptions

NiError on NI error

Implements LSST::M1M3::SS::IFPGA.

◆ writeTimestampFIFO()

void SimulatedFPGA::writeTimestampFIFO ( uint64_t timestamp )

overridevirtual

Write current timestamp value into timestampFIFO.

Shall be called after PPS interrupt is received. See NI forum for details.

Parameters

timestamp current system timestamp in nanoseconds

Exceptions

NiError on NI error

Implements LSST::M1M3::SS::IFPGA.

The documentation for this class was generated from the following files:

FPGA/SimulatedFPGA.h
FPGA/SimulatedFPGA.cpp

Public Member Functions

Additional Inherited Members

Detailed Description

Member Function Documentation

◆ ackModbusIRQs()

◆ ackOuterLoopClock()

◆ ackPPS()

◆ pullHealthAndStatus()

◆ pullTelemetry()

◆ readHealthAndStatusFIFO()

◆ readRawAccelerometerFIFO()

◆ readU8ResponseFIFO()

◆ waitForModbusIRQs()

◆ waitForOuterLoopClock()

◆ waitForPPS()

◆ writeHealthAndStatusFIFO()

◆ writeTimestampFIFO()