| ackIrqs(uint32_t irqs) override (defined in LSST::M1M3::SS::SimulatedFPGA) | LSST::M1M3::SS::SimulatedFPGA | inline |
| ackModbusIRQs() override | LSST::M1M3::SS::SimulatedFPGA | virtual |
| ackOuterLoopClock() override | LSST::M1M3::SS::SimulatedFPGA | virtual |
| ackPPS() override | LSST::M1M3::SS::SimulatedFPGA | virtual |
| close() override (defined in LSST::M1M3::SS::SimulatedFPGA) | LSST::M1M3::SS::SimulatedFPGA | |
| finalize() override (defined in LSST::M1M3::SS::SimulatedFPGA) | LSST::M1M3::SS::SimulatedFPGA | |
| get() (defined in LSST::M1M3::SS::IFPGA) | LSST::M1M3::SS::IFPGA | static |
| getHealthAndStatusFPGAData() | LSST::M1M3::SS::IFPGA | inline |
| getIrq(uint8_t bus) override (defined in LSST::M1M3::SS::SimulatedFPGA) | LSST::M1M3::SS::SimulatedFPGA | inline |
| getRxCommand(uint8_t bus) override (defined in LSST::M1M3::SS::IFPGA) | LSST::M1M3::SS::IFPGA | |
| getSupportFPGAData() | LSST::M1M3::SS::IFPGA | inline |
| getTxCommand(uint8_t bus) override (defined in LSST::M1M3::SS::IFPGA) | LSST::M1M3::SS::IFPGA | |
| healthAndStatusFPGAData (defined in LSST::M1M3::SS::IFPGA) | LSST::M1M3::SS::IFPGA | protected |
| IFPGA() (defined in LSST::M1M3::SS::IFPGA) | LSST::M1M3::SS::IFPGA | inline |
| initialize() override (defined in LSST::M1M3::SS::SimulatedFPGA) | LSST::M1M3::SS::SimulatedFPGA | |
| open() override (defined in LSST::M1M3::SS::SimulatedFPGA) | LSST::M1M3::SS::SimulatedFPGA | |
| pullHealthAndStatus() override | LSST::M1M3::SS::SimulatedFPGA | virtual |
| pullTelemetry() override | LSST::M1M3::SS::SimulatedFPGA | virtual |
| readHealthAndStatusFIFO(uint64_t *data, size_t length, uint32_t timeoutInMs=10) override | LSST::M1M3::SS::SimulatedFPGA | virtual |
| readMPUFIFO(cRIO::MPU &mpu) override (defined in LSST::M1M3::SS::SimulatedFPGA) | LSST::M1M3::SS::SimulatedFPGA | inline |
| readRawAccelerometerFIFO(uint64_t *raw, size_t samples) override | LSST::M1M3::SS::SimulatedFPGA | virtual |
| readU16ResponseFIFO(uint16_t *data, size_t length, uint32_t timeoutInMs) override (defined in LSST::M1M3::SS::SimulatedFPGA) | LSST::M1M3::SS::SimulatedFPGA | |
| readU8ResponseFIFO(uint8_t *data, size_t length, uint32_t timeoutInMs) override | LSST::M1M3::SS::SimulatedFPGA | virtual |
| setPower(bool aux, bool network) | LSST::M1M3::SS::IFPGA | |
| setPower(const bool aux[4], const bool network[4]) | LSST::M1M3::SS::IFPGA | |
| SimulatedFPGA() (defined in LSST::M1M3::SS::SimulatedFPGA) | LSST::M1M3::SS::SimulatedFPGA | |
| supportFPGAData (defined in LSST::M1M3::SS::IFPGA) | LSST::M1M3::SS::IFPGA | protected |
| waitForModbusIRQs(uint32_t, uint32_t) override | LSST::M1M3::SS::SimulatedFPGA | virtual |
| waitForOuterLoopClock(uint32_t) override | LSST::M1M3::SS::SimulatedFPGA | virtual |
| waitForPPS(uint32_t) override | LSST::M1M3::SS::SimulatedFPGA | virtual |
| waitOnIrqs(uint32_t irqs, uint32_t timeout, bool &timedout, uint32_t *triggered=NULL) override (defined in LSST::M1M3::SS::SimulatedFPGA) | LSST::M1M3::SS::SimulatedFPGA | inline |
| writeCommandFIFO(uint16_t *data, size_t length, uint32_t timeoutInMs) override (defined in LSST::M1M3::SS::SimulatedFPGA) | LSST::M1M3::SS::SimulatedFPGA | |
| writeHealthAndStatusFIFO(uint16_t request, uint16_t param=0) override | LSST::M1M3::SS::SimulatedFPGA | virtual |
| writeMPUFIFO(cRIO::MPU &mpu, const std::vector< uint8_t > &data, uint32_t timeout) override (defined in LSST::M1M3::SS::SimulatedFPGA) | LSST::M1M3::SS::SimulatedFPGA | inline |
| writeRequestFIFO(uint16_t *data, size_t length, uint32_t timeoutInMs) override (defined in LSST::M1M3::SS::SimulatedFPGA) | LSST::M1M3::SS::SimulatedFPGA | |
| writeTimestampFIFO(uint64_t timestamp) override | LSST::M1M3::SS::SimulatedFPGA | virtual |
| ~IFPGA() (defined in LSST::M1M3::SS::IFPGA) | LSST::M1M3::SS::IFPGA | inlinevirtual |
| ~SimulatedFPGA() (defined in LSST::M1M3::SS::SimulatedFPGA) | LSST::M1M3::SS::SimulatedFPGA | |
