47class SimulatedFPGA :
public IFPGA {
53 void initialize()
override;
55 void close()
override;
56 void finalize()
override;
70 void writeCommandFIFO(uint16_t *data,
size_t length, uint32_t timeoutInMs)
override;
71 void writeRequestFIFO(uint16_t *data,
size_t length, uint32_t timeoutInMs)
override;
74 void readU16ResponseFIFO(uint16_t *data,
size_t length, uint32_t timeoutInMs)
override;
76 void waitOnIrqs(uint32_t irqs, uint32_t timeout,
bool &timedout, uint32_t *triggered = NULL)
override {
79 void ackIrqs(uint32_t irqs)
override {}
80 uint32_t getIrq(uint8_t bus)
override {
return 0; }
88 std::thread _monitorMountElevationThread;
89 std::mutex _elevationReadWriteLock;
90 SAL_MTMount _mgrMTMount;
92 MTM1M3_hardpointActuatorDataC *_hardpointActuatorData;
96 std::queue<uint16_t> _u8Response;
97 std::queue<uint16_t> _u16Response;
98 std::queue<uint16_t> _subnetAResponse;
99 std::queue<uint16_t> _subnetBResponse;
100 std::queue<uint16_t> _subnetCResponse;
101 std::queue<uint16_t> _subnetDResponse;
102 std::queue<uint16_t> _subnetEResponse;
104 std::queue<uint16_t> _crcVector;
105 void _writeModbus(std::queue<uint16_t> *response, uint16_t data);
106 void _writeModbus16(std::queue<uint16_t> *reponse, int16_t data);
107 void _writeModbus32(std::queue<uint16_t> *reponse, int32_t data);
108 void _writeModbusFloat(std::queue<uint16_t> *response,
float data);
109 void _writeModbusCRC(std::queue<uint16_t> *response);
110 void _writeHP_ILCStatus(std::queue<uint16_t> *response,
int index);
112 void _monitorElevation(
void);
114 float _mountElevation = 90.;
115 std::chrono::steady_clock::time_point _mountElevationValidTo;
116 bool _simulatingToHorizon;
117 bool _mountSimulatedMovementFirstPass =
true;
119 bool _exitThread =
false;
124 std::chrono::time_point<std::chrono::steady_clock> _nextClock;
127 std::chrono::time_point<std::chrono::steady_clock> _lastAirOpen;
129 float _getAirPressure();
131 uint64_t _error_counter;
void readHealthAndStatusFIFO(uint64_t *data, size_t length, uint32_t timeoutInMs=10) override
Copy HealthAndStatus data into supplied data buffer.
Definition SimulatedFPGA.cpp:989